1. Field of the Invention
The present application relates generally to a data processing system and in particular to a method and apparatus for symmetric multiprocessors. More particularly, the present application is directed to a computer implemented method, apparatus, and computer usable program code for automatically managing symmetric multiprocessor interconnects.
2. Description of the Related Art
A processor is an independent processing unit or computational unit capable of executing threads, tasks, or other processes independently of any other processor. A processor may include a single core, as well as two or more cores located on a single die. A processor having two or more cores is referred to as a multi-core microprocessor. As used herein, a processor includes, but is not limited to, a central processing unit (CPU), graphics processor, a multi-core microprocessor, or any other known or available type of processor.
A computer system having two or more independent processors is referred to as a multiprocessor. Each processor on a multiprocessor is plugged into its own processor socket and shares the same platform interface which connects each processor to memory, input/output, and storage resources. The processors in the multiprocessor system share address bus, data bus, which is also referred to as a computer bus, and self sync buses. The processors also share storage subsystems. However, each processor has its own memory controller, level one (L1) cache, and level two (L2) cache. As used herein, a multiprocessor system is a computer system that includes all the independent processors sharing address buses, data buses, self sync buses, and/or storage subsystems.
A symmetric multiprocessor system is a multiprocessor in which two or more identical processors are connected to a single shared main memory. A symmetric multiprocessor treats all processors in a multiprocessor system identically. In contrast, an asymmetric multiprocessor assigns certain tasks only to certain processors.
In a symmetric multiprocessor, it is important that two or more processors be able to access shared memory and execute on common data sets without interfering with the other processor's performance. Therefore, all processors in a symmetric multiprocessor system should be synchronized with one another during initialization of the multiprocessor.
Synchronization is a matter of time keeping. Each processor needs to be synchronized or in sync time-wise with every other processor in order to coordinate simultaneous threads or tasks executing on the multiprocessor. In other words, all of the processors need to be set to the same time. The processors are synchronized with each other by sending a data packet to each processor. The processors are able to use this data packet to synchronize (sync) with every other processor.
Processors transmit data packets to other processors on a multiprocessor by means of an interconnect bus. The interconnect bus is a communications path between all the processors on the multiprocessor. In other words, the interconnect bus connects the independent processors together by means of links or connections between two or more processors. Each processor contains driver ports for sending data to the other processors through the interconnect bus and receiving ports for receiving data from the other processors through the interconnect bus.
Currently, each multiprocessor platform is built with a specific network of interconnects, referred to as an interconnect map. The interconnect map provides information regarding all the links and connections in the interconnect bus. This interconnect map is created by system architects and provided in the system workbooks. A system workbook is a document written for multiprocessor system developers and testers. A system workbook typically contains technical data about a processor chip, a multiprocessor system, or any other technical data regarding a computer system. The interconnect map is provided in system workbooks or simply communicated from the processor chip designers to the firmware programmers. Based on this interconnect map, firmware designers select a path map.
The path map is a predetermined communication path between the processors. In other words, the path map provides a single, one-way path for traversing each processor during initialization of the processors when a multiprocessor system is booted. The path map is used to initialize and synchronize the processors. The path map is hard coded in a multiprocessor systems firmware. The path map is generated based on the interconnect map.
However, the interconnect map is sometimes inaccurate and includes mistakes or incorrect information. In addition, an interconnect map is sometimes not available in system workbooks or from any other source. In such cases, a user can sometimes decipher or generate an interconnect map based on schematics for the multiprocessor system. However, most engineers have limited access to multiprocessor system schematics. In addition, manually deciphering an interconnect map based on schematics is a time consuming and burdensome process for a user.
Unlike the interconnect map, the path map is hard-coded in system firmware. The path map is not updated or modified after its initial creation and coding into firmware. In addition, the path map only provides a single path out of many possible paths that are actually available in the hardware. In other words, multiple routes between the processors could be available. However, a system will only use the one path provided in the path map that is hard coded in firmware. If an interconnect link in the path map fails, the system has no way of passing addresses, data, and/or sync packets between the processors. This results in the system failing beyond repair. Thus, if a system encounters a faulty interconnect during initialization or runtime, the system will shut down and be unable to recover.